Verification IP

 

Sibridge's offers modular, reusable, scalable VIP cores that enable customers to rapidly build verification environments for module, chip and complex SoCs. Our team of verification experts help develop extensible verification environments to provide maximum functional coverage, thereby reducing the time to market.

Verification IP Benefits
  • Seamless integration with VMM/OVM/UVM based environments
  • Customer proven and validated
  • Configurable environment with easy multiple instances creation
  • Easy to address customization, interface modification and feature addition
  • Hook ups to enable modification of data flowing through VIP
  • Facilitates wide variety of error injection at packet/frame/transfer and protocol level
  • Callbacks & Analysis ports to facilitate useful interaction within Environment
  • Built-in coverage to facilitate in analysis of verification progress
  • Dedicated support team of domain & methodology experts

Portfilio of Verification IP



  • SystemVerilog Source Code
  • User Guide and Release Notes
  • Sanity Testcases
  • Test Plan + Coverage Plan [Upon Request]
  • Examples on topological usage
  • Sample Verification Environmenttion