Soft Core (RTL IP) Enhanced UART with FIFOs & IrDA Support

The SI-M16x50 is an extension of the SI-M16550S UART with FIFOs, with enhancements that emulate features found in similar discrete devices with a range of part numbers. Some of the enhancements are enabled by software and are always present in the design: some – such as maximum FIFO size – are configurable and are selected on compilation.Like the SI-M16550S, the SI-M16x50 offers programmable word length (from five to eight bits), together with an optional parity bit and 1, 1½ or 2 stop bits. If enabled, the parity can be odd, even or forced to a defined state.

  • Software compatible with 16C450- and 16550A- compatible UARTs
  • Hardware & Software Flow Control
  • IrDA Modulation/Demodulation
  • Transmit FIFO Threshold
  • Configurable FIFO Depth


  • Verilog Source code with lint checking
  • Verilog functional testbench and associated documentation
  • Design documentation