PCMCIA Host Controller
Overview:

The Sibridge Technologies PCMCIA core provides an efficient and easy-to-use interface to devices that are PCMCIA card 2.1 compliant. The core generates read/write cycles for attribute memory, common memory, and I/O modes. The core is designed to interface to the processor through a CoreFrameĀ® bus interface. 



Features:
  • Supports memory and I/O modes
  • Supports 8-bit and 16-bit accesses
  • Up to 20 MB/s transfer rate in common memory mode
  • Up to 17 MB/s transfer rate in PIO mode
  • Conforms to PCMCIA card 2.1 standard
  • Data transfer to/from memory via DMA or PIO interface


 


  • Verilog Source code with lint checking
  • Verilog functional testbench and associated documentation
  • Design documentation