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USB High/Full Speed Multi-Point OTG
Chip Verification Services


USB design IP block diagram
  • Applicable for point to point and multipoint USB OTG (On The Go). Can be used as host or peripheral in point to pint OTG.
  • Supports high, full, low speed USB devices.
  • Complies with USB 2.0 standards and supports 480 Mbps with high speed and 12 Mbps with low speed with the OTG.
  • 32 Bit AMBA AHB compatible interface.
  • Configurable upto 15 additional transmit and receive end points.
  • UTMI + level 3 transceiver interface with optional ULPI link Wrapper.
  • Configurable FIFOs with option of dynamic FIFO sizing. Supports for external DMA access to FIFOs.
  • Graphical user interface for core configuration.
 



Deliverables

  • Verilog Source code
  • Functional test bench
  • Synthesis Constraint files
  • Product specifications and user/programmer's guide

Best-in-class Support for IP

  • Team with protocol and design expertise
  • IP integration support and services
  • Portfolio of Verification IP in SystemVerilog
  • Driver development and firmware validation
  • FPGA emulation and prototyping

Other IPs

Ethernet 10/100/1000 Mbps

USB OTG
Serial ATA Host Controller
Parallel ATA device controller
PCMCIA
Gigabit Ethernet VIP
I2C Verification IP