IP Development

Verification IP
  • Reusable blocks and infrastructure to reduce the  development time 
  • Tool agnostic library & methodology for tool independent VIP  development. 
  • Strong guidelines and memory profiling for better simulation  run time 
  • More robust verification including interoperability for easy  integration to  actual SoC Environment 
  • Extensive experience in 
o Industry std. interfaces like USB, PCI Express, Ethernet, PCI, HDMI, SATA
o Develop Verification IP using different languages and methodologies 
 System Verilog VIP using VMM or AVM
 Vera VIP using RVM
 eVC using eRM
  • Assertion IP development using SVA, PSL or OVA.
  • Design IP validation using different VIPs
  • IP development for standard or proprietary interface




  • Micro Architecture Design
  • Design IP Development
  • Verification IP Development
  • IP integration
  • FPGA based systems design
  • ASIC/SoC Prototyping
  • Pre and Post Silicon Validation